![]() The failing SD-cards are for the most part the consumer Per your request, I’m also to the list of recipients. * Erratum: Enable SDHCI spec v3.Thank you for your answer and time, Jason, it’s really appreciated. Misc_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL) + clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL) Static void tegra_sdhci_do_calibration(struct sdhci_host -521,7 +532,7 sdhci_tegra *tegra_host = pltfm_host->priv Ĭonst struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data Ĭonst struct tegra_sdhci_platform_data *plat = tegra_host->plat Struct pinctrl_state *default_drv_code_strength #define NVQUIRK2_TEGRA_WRITE_REG -239,6 +249,7 pinctrl_state *schmitt_disable * Tegra register write WAR - needs follow on register read */ #define NVQUIRK2_SET_PLL_CLK_PARENT BIT(0) +#define NVQUIRK_SDMMC_CLK_OVERRIDEěIT(9) ![]() #define NVQUIRK_BROKEN_RTPM_FORBID BIT(8) #define NVQUIRK_UPDATE_PIN_CNTRL_REG BIT(7) +#define SDHCI_TEGRA_VENDOR_MISC_CTRL_2 0x128 #define SDHCI_MISC_CTRL_ENABLE_DDR50 0x200 +#define SDHCI_CLOCK_CTRL_SDMMC_CLK BIT(0) ![]() +#define SDHCI_CLOCK_CTRL_LEGACY_CLKEN_OVERRIDE BIT(6) +#define SDHCI_TEGRA_VENDOR_CLOCK_CTRL 0x100 +/* Tegra SDHOST controller vendor register definitions */ #define SDHCI_VNDR_CLK_CTRL_SDMMC_CLK 0x1 + host->ops->voltage_switch_req(host, true) ĭiff -git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c + host->ops->voltage_switch_req(host, false) Add nvquirk to make this change chip agnostic asĭifferent register sets identify SLCG on different chips.ĭiff -git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c Change to modify only card clock in mmc_set_ios during voltage switch. Enable SLCG based on prods only after voltage switch sequence Subject: drivers: mmc: Fix voltage switch sequence What is the suggested fix for this problem?Ĭan you comment on what SD/MMC driver changes were made between the 24.2 or 28.1 releases? Mmc2 sdhci_data_irq 2788 SDHCI_INT_DATA_CRCįor the SD cards we were are targeting, this resulted in a sharp decrease in the write performance: from 50 Mbps to 12 Mbps on average. Mmc2 sdhci_data_irq 2776 SDHCI_INT_DATA_TIMEOUT On the TX2, we have also found that when cards are correctly mounted as UHS, a temperature change from 25C to 60C will cause some driver errors: It looks like the problem is a change in drivers made between the R24.2 and R28.1 releases. It was not reproduced on the 24.2 release. The problem was reproduced in the 28.1 release. ![]() This was to identify if the problem was the hardware (TX2 vs TX1) or software (R24.2 vs 28.1) release. I noticed that there is a factory image available for the TX1, so we ran some tests between the R24.2 and R28.1 releases. No hardware or software customizations were performed. The TX2 on the Jetson devkit was flashed with NVIDIA’s R28.1 factory image. We discovered this problem on our custom carrier board, but we are also able to consistently reproduce this on the Jetson devkits. Without this, we cannot achieve the desired write speeds to an SD card that we are looking for. This data was obtained by reading the /sys/kernel/debug/mmc2/ios file in linux. They typically mount with a timing spec of “sd high-speed”, instead of the expected “sd uhs SDR104” spec. SD cards don’t seem to consistently mount in the correct mode on the TX2.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |